Digital Principles and Computer Organization: Chapter 8: Instruction Set Architecture and Control Unit Design: Anna University Part A Two Marks Important Questions and Answers
Digital Principles and Computer Organization:
Chapter 8: Instruction Set Architecture and Control
Unit Design
Two
Marks Questions with Answers
1. What is an
Instruction Set Architecture (ISA)?
Answer: ISA is the interface between hardware and
software. It defines the set of instructions a CPU can execute, their formats,
data types, addressing modes, and behaviour.
2. Why is
ISA important for compatibility and portability?
Answer:
Programs
written for one ISA can run on any processor that implements the same ISA. This
ensures software portability across different hardware platforms.
3. Explain
the relation between ISA, hardware, and software.
Answer:
•
Software uses the ISA to write and execute programs.
•
ISA acts as a bridge by defining instructions, registers and memory access
methods.
•
Hardware implements the ISA in CPU components, memory and I/O devices to
execute instructions.
4. What
are the key components of an ISA?
Answer: Key components include :
1. Instruction Set
(arithmetic, logical, data transfer, control flow)
2. Instruction Format
(opcode, operands, immediate values)
3. Data Types
(integer, floating point, characters)
4. Registers
(number, type, size)
5.
Addressing modes and Memory model
6.
I/O mechanisms, interrupts, exceptions
7.
Privilege levels and parallelism support
5. What
does an instruction format specify ?
Answer: It specifies the opcode,
operand fields, immediate values and control bits. It determines instruction
length and decoding complexity.
6. What
is CISC architecture ?
Answer: CISC (Complex
Instruction Set Computer) architecture uses a large set of complex instructions
where each instruction can perform multiple low–level operations, such as
memory access, arithmetic and logic, in a single instruction.
7. What
is RISC architecture ?
Answer: RISC (Reduced
Instruction Set Computer) architecture uses a small and simple set of instructions,
each designed to execute very quickly, usually within one clock cycle.
8. Give
one example each of CISC and RISC processors.
Answer:
CISC processor :
Intel × 86 family
RISC processor :
ARM, MIPS, or PowerPC
9. State
one main difference between CISC and RISC.
Answer: CISC has many complex instructions that may
take multiple cycles to execute, while RISC has fewer and simpler instructions that typically execute in one clock
cycle.
10. What
are addressing modes ?
Answer: The different ways that
a processor can access data are referred to as addressing schemes or addressing modes.
11. List
different addressing modes.
Answer:
1.
Register Mode
2.
Absolute Mode or Direct Mode
3.
Immediate Mode
4.
Indirect Mode
5.
Index Mode
6.
Relative Mode
7.
Autoincrement Mode
8.
Autodecrement Mode
12. Differentiate
direct and indirect addressing mode.
Answer: In direct addressing
mode the address of the location of the operand is given explicitly as a part
of the instruction. On the other hand, in indirect addressing mode, the
effective address of the operand is the contents of a register or the main
memory location whose address is given explicitly in the instruction.
13. State
the basic addressing modes supported by RISC processor.
Answer: The RISC processor has
three basic addressing modes :
•
Register addressing
•
Immediate operand and
•
Relative to PC addressing for branch instructions.
14. What
is relative addressing mode? When is it used?
Here,
the referenced register is program counter (PC) and hence this addressing mode
is also known as PC–relative addressing.
The
effective address is determined by adding the contents of PC to the address
field. EA = PC + Address part of instruction.
The
address part is a signed number so that it is possible to have branch target
location either before or after the branch instruction. This addressing mode is
commonly used to specify the target address in branch instructions.
• Example :
JNZ BACK: This instruction causes program execution to go to the branch target
location identified by the name BACK, if the branch condition is satisfied.
15. What
are addressing modes?
Part
of the programming flexibility for each processor is the number and different
kind of ways the programmer can refer to data stored in the memory or I/O
device. The different ways that a processor can access data are referred to as addressing schemes or addressing modes.
16. What
do you mean by effective address?
An
address computed by the processor when executing a memory access or branch
instruction or when fetching the next sequential instruction is known as Effective Address (EA). An effective
address can be made up from as many as three elements : The base, index and displacement.
17. List
any four addressing modes ?
1.
Immediate addressing
2.
Register addressing
3.
Base or displacement addressing
4.
PC–relative addressing
5.
Pseudodirect addressing
18. What
is immediate addressing mode?
The
operand is given explicitly in the instruction.
• Example : MOV
#20, A : This instruction copies operand 20 in the register A. The sign # in
front of the value of an operand is used to indicated that this value is an immediate operand.

19. What
is indirect addressing mode ?
In this addressing mode, the instruction contains the address of memory which refers the address of the operand.
20. What
is displacement addressing mode ?
This
addressing mode combines the capabilities of direct addressing and register
indirect addressing. In this addressing mode, instruction has two address
fields : Value and referenced register. The effective address is computed by adding contents
of referenced register to value.
EA
= value + (R)
Three
common variation of displacement addressing are :
■
Relative addressing
■
Base register addressing
■
Index addressing.

21. What
is base register addressing mode ?
The
effective address of the operand is the contents of a register or the main
memory location whose address is given explicitly in the instruction.
Example :
MOV (R0), A : This instruction copies the contents of memory addressed by the
contents of register R0 into the
register A.

22. What
is index addressing mode ?
In
this addressing mode, the address field references the main memory and the
referenced register contains a positive displacement from that address. EA =
Memory address + (R).
The
indexing is a technique that allows programmer to point or refer the data
(operand) stored in sequential memory locations one by one. It is an efficient
mechanism for performing iterative operations.
• Example :
MOV [R1 + RI], R : In this instruction main memory address is given by register
R1 and the referenced register RI gives the positive displacement. The contents
of the memory address generated by the addition of main memory address and
displacement is copied to register R.
23.What
is autoincrement addressing mode?
The
effective address of the operand is the contents of a register specified in the
instruction. After accessing the operand, the contents of this register are
incremented to address the next location.
• Example :
MOV R0, (R2)+ : The above instruction copies the contents of register R0 into
the memory location whose address is specified by the contents of register R2.
After copy operation, the contents of register R2 are automatically incremented
at by 1.
24 What
is autodecrement addressing mode ?
The
contents of a register specified in the instruction are decremented and then
they are used as an effective address to access a memory location.
• Example :
MOV – (R0), R1 : This instruction, initially decrements the contents of
register R0 and then the decremented contents of register R0 are used to
address the location. Finally, the contents from the addressed memory location
are memory copied into the register R1.
25. What
is stack addressing mode ?
A
stack is linear array of reserved memory locations. It is associated with a pointer
called Stack Pointer (SP).
In
stack addressing mode, stack pointer always contains the address of Top Of
Stack (TOS) where the operand is to be stored or located. Thus, the address of
the operand (source or destination) is the contents of stack pointer.
This
addressing mode is the special case of register indirect addressing where
referenced register is a stack pointer.
Usually,
stack grows in the direction of descending addresses, (descending stack),
starting from a high address and progressing to lower one. In this stack, SP is
decremented before any items are appended (pushed) on stack and SP is
incremented after any items popped from the stack.
• Example :
PUSH R : This instruction decrements SP and copies the contents of register R
on to the top of stack pointed by stack pointer.
26. Brief
about relative addressing mode with an example.
Here,
the referenced register is program counter (PC) and hence this addressing mode
is also known as PC–relative addressing.
The
effective address is determined by adding the contents of PC to the address
field. EA = PC + Address part of instruction.
The
address part is a signed number so that it is possible to have branch target
location either before or after the branch instruction. This addressing mode is
commonly used to specify the target address in branch instructions.
• Example :
JNZ BACK: This instruction causes program execution to go to the branch target
location identified by the name BACK, if the branch condition is satisfied.
27. What
is meant by an addressing mode? Mention most important of them.
Part
of the programming flexibility for each processor is the number and different
kind of ways the programmer can refer to data stored in the memory or I/O
device. The different ways that a processor can access data are referred to as addressing schemes or addressing modes.
An
address computed by the processor when executing a memory access or branch
instruction or when fetching the next sequential instruction is known as Effective Address (EA). An effective address
can be made up from as many as three elements : The base, index and displacement.
28. Distinguish between autoincrement and autodecrement addressing mode.
Autoincrement
addressing mode : The effective address of the operand is
the contents of a register specified in the instruction. After accessing the
operand, the contents of this register are incremented to address the next
location.
• Example :
MOV R0, (R2)+ : The above instruction copies the contents of register R0 into
the memory location whose address is specified by the contents of register R2.
After copy operation, the contents of register R2 are automatically incremented
at by 1.
Autodecrement
addressing mode : The contents of a register specified in
the instruction are decremented and then they are used as an effective address
to access a memory location.
• Example :
MOV – (R0), R1 : This instruction, initially decrements the contents of
register R0 and then the decremented contents of register R0 are used to
address the location. Finally, the contents from the addressed memory location
are memory copied into the register R1.
29. State the need for indirect addressing mode.
Give an example.
Answer: In indirect addressing
mode, the instruction specifies the address where the address of the operand is
located. In case of register indirect addressing, the address of the operand is
specified by the contents of the register. These operating modes are needed
when we need to access arrays. Specifically, in register indirect addressing,
registers are used as pointers and they are very useful for dealing with arrays
or tables of simple data values.

Consider
Fig. 8.7.1, where a data structure consists of a sequence of consecutive byte
values. The pointer register contains (1000)H, corresponding to the
first item in the structure. To access item 2 in the structure we only need to
increment the value in the pointer register.
30. State
the advantages of hardwired control unit.
Answer:
•
Hardwired control unit is fast because control signals are generated by
combinational circuits.
•
The delay in generation of control signals depends upon the number of gates.
•
It has greater chip area efficiency since its uses less area on–chip.
31. State
the disadvantages of hardwired control unit.
Answer:
•
More the control signals required by CPU; more complex will be the design of
control unit.
•
Modifications in control signal are very difficult. That means it requires
rearranging of wires in the hardware circuit.
•
It is difficult to correct mistake in original design or adding new feature in
existing design of control unit.
32. What
is microprogramming ?
Answer: Microprogramming is a method of control unit design in which the
control signal selection and sequencing information is stored in a ROM or RAM
called a control memory CM.
33. What
is control memory ?
Answer: A memory that is part
of a control unit is referred to as a control
memory. It stores the sequences of micro–operations to be performed to
execute microinstructions.
34. Give
full form of CAR.
Answer: CAR stands for Control
Address Register.
35. What
is microprogram sequencing ?
Answer: Determining the
address of the next microinstruction to be executed using microprogram
sequencer is called microprogram
sequencing.
37. What
is address sequencing ?
Answer: Each computer
instruction has its own microprogram routine in control memory to generate the
micro–operations that execute the instruction. To execute a particular computer
instruction, accessing a corresponding microinstruction routine, sequencing the
microinstructions within the routine and if necessary branching from one
routine to another is known as address
sequencing.
37. What
is microinstruction ?
Answer: Each word in the
control memory is a microinstruction which specifies the control signals to be
activated to perform one or more micro–operations.
38. What
is microcode ?
Answer: The translation of
symbolic microprogram to binary produces a binary microprogram called microcode.
39. What
is microprogram ?
Answer: A sequence of one or
more micro–operations designed to perform specific operation, such as addition,
multiplication is called a microprogram.
40. What
is pipeline register?
Answer: The control data
register holds the present microinstruction while the next address is computed
and read from memory. This data register is sometimes called a pipeline register. It allows the
execution of micro–operations specified by the control word and the generation
of the next microinstruction simultaneously.
Digital Principles and Computer Organization: Chapter 8: Instruction Set Architecture and Control Unit Design : Tag: : Digital Principles and Computer Organization - Instruction Set Architecture and Control Unit Design: Two Marks Important Questions and Answers
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