Introduction of Counter

Digital Principles and Computer Organization:

Chapter 6: Sequential Circuits – Counters

Introduction

• A group of flip–flops connected together forms a register. A register is used solely for storing and shifting data which is in the form of 1s and/or 0s, entered from an external source. It has no specific sequence of states except in certain very specialized applications. A  counter is a register capable of counting the number of clock pulses arriving at its clock input. Count represents the number of clock pulses arrived. On arrival of each clock pulse, the counter is incremented by one. In case of down counter, it is decremented by one.

• Fig. 6.1.1 shows the logic symbol of a binary counter. External clock is applied to the clock input of the counter. The counter can be positive edge triggered or negative edge triggered. The n–bit binary counter has n flip–flops and it has 2ⁿ distinct states of outputs. For example, 2–bit counter has 2 flip–flops and it has 4(2²) distinct states : 00, 01, 10 and 11. Similarly, the 3–bit binary counter has 3 flip–flops and it has 8 (2³) distinct states : 000, 001, 010, 011, 100, 101 110 and 111.

• The maximum count that the binary counter can count is 2^n–1. For example, in 2–bit binary counter, the maximum count is 2^2–1 = 3 (11 in binary). After reaching the maximum count the counter resets to 0 on arrival of the next clock pulse and it starts counting again.

Synchronous counter : When counter is clocked such that each flip–flop in the counter is triggered at the same time, the counter is called synchronous counter.

Asynchronous counter / Ripple counter : A binary asynchronous/ripple consists of a series connection of complementing flip–flops, with the output of each flip–flop connected to the clock input of the next higher–order flip–flop. The flip–flop holding the least significant bit receives the incoming clock pulses.

• Table 6.1.1 shows the comparison between synchronous and asynchronous counters.

Asynchronous counters

1. In this type of counter flip–flops are connected in such a way that output of first flip–flop drives the clock for the next flip–flop.

2. All the flip–flops are not clocked simultaneously.

3. Logic circuit is very simple even for more number of states.

4. Main drawback of these counters is their k of these counters is their low speed as the clock is propagated through number of flip–flops before it reaches last flip–flop.

Synchronous counters

1. In this type there is no connection between output of first flip–flop and clock input of the next flip–flop.

2. All the flip–flops are clocked simultaneously.

3. Design involves complex logic circuit as number of states increases.

4. As clock is simultaneously given to all flip–flops there is no problem of propagation delay. Hence they are high speed counters and are preferred when number of flip–flops increases in the given design.

Modulus of Counter

• The total number of counts or stable states a counter can indicate is called 'Modulus'. For instance, the modulus of a four–stage counter would be 16₁₀, since it is capable of indicating 0000₂ to 1111₂. The term 'modulo' is used to describe the count capability of counters. For example, mod 6 counter goes through states 0 to 5 and mod 4 counter goes through states 0 – 3.

Example: 1

Draw the state diagram of MOD–10 counter.

Solution :

Review Questions

1. What is counter?

2. State types of counters.

3. Compare synchronous and asynchronous counter.

4. Define modulus of a counter.