Digital Principles and Computer Organization: Chapter 6: Sequential Circuits - Counters

Sequential Circuits - Counters: Two Marks Important Questions and Answers

Digital Principles and Computer Organization

Digital Principles and Computer Organization: Chapter 6: Sequential Circuits - Counters: Anna University Part A Two Marks Important Questions and Answers

Digital Principles and Computer Organization:

Chapter 6: Sequential Circuits – Counters


Two Marks Questions with Answers

 

1. What is counter?

A  counter is a register capable of counting the number of clock pulses arriving at its clock input. Count represents the number of clock pulses arrived. On arrival of each clock pulse, the counter is incremented by one. In case of down counter, it is decremented by one.

2. What is Synchronous counter?

When counter is clocked such that each flip–flop in the counter is triggered at the same time, the counter is called synchronous counter.

3. What is Asynchronous counter ?

A binary asynchronous/ripple consists of a series connection of complementing flip–flops, with the output of each flip–flop connected to the clock input of the next higher–order flip–flop. The flip–flop holding the least significant bit receives the incoming clock pulses.

4. What is the difference between synchronous and asynchronous counter ?

• Table 6.1.1 shows the comparison between synchronous and asynchronous counters.


Asynchronous counters

1. In this type of counter flip–flops are connected in such a way that output of first flip–flop drives the clock for the next flip–flop.

2. All the flip–flops are not clocked simultaneously.

3. Logic circuit is very simple even for more number of states.

4. Main drawback of these counters is their k of these counters is their low speed as the clock is propagated through number of flip–flops before it reaches last flip–flop.

Synchronous counters

1. In this type there is no connection between output of first flip–flop and clock input of the next flip–flop.

2. All the flip–flops are clocked simultaneously.

3. Design involves complex logic circuit as number of states increases.

4. As clock is simultaneously given to all flip–flops there is no problem of propagation delay. Hence they are high speed counters and are preferred when number of flip–flops increases in the given design.

5. Name the different types of counter.

 Answer: a) Synchronous counter

b) Asynchronous counter

i) Up counter

ii) Down counter

iii) Modulo – N counter

iv) Up / Down counter

6. What is the primary disadvantage of an asynchronous counter ?

Main drawback of these counters is their k of these counters is their low speed as the clock is propagated through number of flip–flops before it reaches last flip–flop.

7. What is meant by programmable counter? Mention its application.

 Answer:  A counter that divides an input frequency by a number which can be programmed, is called programmable counter.

Applications of programmable counter

1. Frequency division

2. Digital clock

3. Stop watch

4. Programmable logic controllers.

8. Define asynchronous counter.

 Answer:  The counter in which the output of the current flip–flop drives the clock input of the net higher–order flip–flop is called asynchronous counter.

9. What is up counter ?

 Answer:  A counter that increments the output by one binary number each time a clock pulse is applied.

10. What is down counter ?

 Answer: A counter that decrements the output by one binary number each time a clock pulse is applied.

11. What is up/down counter?

 Answer: A counter, which is capable of operating as an up counter or down counter, depending on a control input.

12. What is a ripple counter ?

A binary asynchronous/ripple consists of a series connection of complementing flip–flops, with the output of each flip–flop connected to the clock input of the next higher–order flip–flop. The flip–flop holding the least significant bit receives the incoming clock pulses.

13. Form the truth table for 3–bit binary down counter.

 Answer:


14. What is the minimum number of flip–flops needed to design a counter of modulus 60 ?

 Answer: 2n  ≥ 60     n = 6

15. What is the minimum number of flip–flops required to implement a modulo 21 synchronous counter ?

 Answer: 2n  ≥ 21      n = 5

16. Define synchronous counter.

 Answer:  When counter is clocked such that each flip–flop in the counter is triggered at the same time, the counter is called synchronous counter.

17. Draw the state diagram of MOD–10 counter.

 Answer:


18. What is meant by modulus of a counter ?

The total number of counts or stable states a counter can indicate is called 'Modulus'. For instance, the modulus of a four–stage counter would be 1610, since it is capable of indicating 00002 to 11112. The term 'modulo' is used to describe the count capability of counters. For example, mod 6 counter goes through states 0 to 5 and mod 4 counter goes through states 0 – 3.

19. What is meant by natural count of a counter?

 Answer:  By the term natural count of a counter we say that the maximum number of states through which a counter can progress.

20. The number of flip–flops required for modulo–18 counter is ––––––––––––.

 Answer: five.

21. How many flip–flops are required to build a binary counter that counts from 0 to 1023 ?

 Answer: 2n  ≥ 1024        n = 10

22. What are the applications of counter ?

 Answer: Applications of counter are :

• Frequency division

• Digital clock

• Stop watch

• Programmable logic controllers

23. Write short note on digital clock.

 Answer: Digital clock displays seconds, minutes and hours. 1 Hz clock frequency is applied to the cascaded combination of divide–by–10 counter and divide–by–6 counter forms divide–by–60 counter. This counter counts seconds from 0–59. The ripple carry from this counter is applied to the enable input of another pair of divide–by–60 (10 × 6) counter. This counter counts minutes. The hours counter is implemented with a decade counter and a flip–flop.

24. How does ripple counter differ from synchronous counter?

A binary asynchronous/ripple consists of a series connection of complementing flip–flops, with the output of each flip–flop connected to the clock input of the next higher–order flip–flop. The flip–flop holding the least significant bit receives the incoming clock pulses.

 

Digital Principles and Computer Organization: Chapter 6: Sequential Circuits - Counters : Tag: : Digital Principles and Computer Organization - Sequential Circuits - Counters: Two Marks Important Questions and Answers


Digital Principles and Computer Organization: Chapter 6: Sequential Circuits - Counters



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