Memory and IO: Two Marks Important Questions and Answers

Computer Organization and Architecture

Chapter 4: Memory and IO

 

Two Marks Questions with Answers

 

1. Name the two types of storage devices.

Answer: The two types of storage devices are :

1. Primary memory

2. Secondary memory

2. Define memory latency.

Answer: The term memory latency is used to refer to the amount of time it takes to transfer a word of data to or from the memory. The term latency is used to denote the time it takes to transfer the first word of data. This time is usually substantially longer than the time needed to transfer each subsequent word of a block.

3. Define memory bandwidth.

Answer: Memory bandwidth is a product of the rate at which the data are transferred (and accessed) and the width of the data bus.

4. What will be the width of address and data buses for a 512 K × 8 memory chip?

Answer: The widths of address and data buses are 19 and 8, respectively.

5. What do you mean by memory hierarchy ?

Answer: A memory hierarchy is a structure of memory that uses multiple levels of memories; as the distance from the processor increases, the size of the memories and the access time both increase.

6. What is the need to implement memory as a hierarchy ?

Answer: Ideally, computer memory should be fast, large and inexpensive. Unfortunately, it is impossible to meet all the three of these requirements using one type of memory. Hence it is necessary to implement memory as a hierarchy.

7. What is cache memory?

Answer: In the memory system small section of SRAM is added along with main memory, referred to as cache memory.

8. Define hit rate or hit ratio.

Answer: The percentage of accesses where the processor finds the code or data word it needs in the cache memory is called the hit rate or hit ratio.

9. Define miss rate and miss penalty.

Answer: The percentage of accesses where the processor does not find the code or data word it needs in the cache memory is called the miss rate. Extra time needed to bring the desired information into the cache is called the miss penalty.

10. Define multi‒level cache.

Answer: A memory hierarchy with multiple levels of caches, rather than just a cache and main memory is called multi‒level cache.

11. Define global miss rate.

Answer: The fraction of references that miss in all levels of a multilevel cache is called global miss rate.

12. Define local miss rate.

Answer: In a multilevel cache system, the fraction of references to one level of a cache that miss is called local miss rate.

13. What is program locality?

Answer: In cache memory system, prediction of memory location for the next access is essential. This is possible because computer systems usually access memory from the consecutive locations. This prediction of next memory address from the current memory address is known as program locality.

Program locality enables cache controller to get a block of memory instead of getting just a single address.

14. Define locality of reference. What are its types ?

Answer: The program may contain a simple loop, nested loops or a few procedures that repeatedly call each other. The point is that many instructions in localized area of the program are executed repeatedly during some time period and the remainder of the program is accessed relatively infrequently. This is referred to as locality of reference.

15. Define the terms: spatial locality and temporal locality.

Answer: Locality of reference manifests itself in two ways : temporal and spatial. The temporal means that a recently executed instruction is likely to be executed again very soon. The spatial means that instructions stored near by to the recently executed instruction are also likely to be executed soon.

16. Explain the concept of block fetch.

Answer: Block fetch technique is used to increase the hit rate of cache. A block fetch can retrieve the data located before the requested byte (look behind) or data located after the requested byte (look ahead) or both. When CPU needs to access any byte from the block, entire block that contains the needed byte is copied from main memory into cache.

17. Name the common replacement algorithms.

Answer: The four most common replacement algorithms are:

1. Least‒Recently Used (LRU)

2. First‒In‒First‒Out (FIFO)

3. Least‒Frequently‒Used (LFU)

4. Random

18. What is a mapping function?

Answer: Usually, the cache memory can store a reasonable number of blocks at any given time, but this number is small compared to the total number of blocks in the main memory. The correspondence between the main memory blocks and those in the cache is specified by a mapping function.

19. List the mapping techniques.

Answer: There are two main mapping techniques which decides the cache organization :

1. Direct ‒ mapping technique

2. Associative ‒ mapping technique

The associative mapping technique is further classified as fully associative and set associative techniques.

20. Define direct‒mapped cache.

Answer: Direct‒mapped cache is a cache structure in which each memory location is mapped to exactly one location in the cache.

21. Define fully associative cache.

Answer: Fully associative cache is cache structure in which a block can be placed in any location in the cache.

22. Define set ‒ associative cache.

Answer: Set ‒ associative cache is a cache that has a fixed number of locations (at least two) where each block can be placed.

23. Define tag field related to memory.

Answer: A field in a table used for a memory hierarchy that contains the address information required to identify whether the associated block in the hierarchy corresponds to a requested word is called tag bit.

24. Define valid bit related to memory.

Answer: A field in the tables of a memory hierarchy that indicates that the associated block in the hierarchy contains valid data is called valid bit.

25. Define split cache.

Answer: A scheme in which a level of the memory hierarchy is composed of two independent caches that operate in parallel with each other, with one handling instructions and one handling data is called split cache.

26. What is the need of cache updating?

Answer: In a cache system, two copies of same data can exist at a time, one in cache and one in main memory. If one copy is altered and other is not, two different sets of data become associated with the same address. To prevent this cache updating is needed.

27. Name the different cache updating systems.

Answer: The different cache updating systems are:

• Write through system

• Buffered write through system and

• Write‒back system

28. What is a hit ?

Answer: A successful access to data in cache memory is called hit.

29. Define cache line or cache block.

Answer: Cache block is used to refer to a set of contiguous address locations of some size that can be either present or not present in a cache. Cache block is also referred to as cache line.

30. What are the two ways in which the system using cache can proceed for a write operation ?

Answer: Write through protocol technique.

Write‒back or copy back protocol technique.

31. What is write through protocol ?

Answer: In write through updating system, the cache controller copies data to the main memory immediately after it is written to the cache. Due to this main memory always contains a valid data and any block in the cache can be overwritten immediately without data loss.

32. What is write ‒ back or copy back protocol?

Answer: In a write back system, the alter bit in the tag field is used to keep information of the new data. Cache controller checks this bit before overwriting any block in the cache. If it is set, the controller copies the block to main memory before loading new data into the cache.

33. When does a read miss occur?

Answer: When the addressed word in a read operation is not in the cache, a read miss occur.

34. What is write miss?

Answer: During the write operation if the addressed word is not in cache then said to be write miss.

35. What is load through or early restart?

Answer: When a read miss occurs for a system with cache the required word may be sent to the processor as soon as it is read from the main memory instead of loading into the cache. This approach is called load through or early restart and it reduces the processor's waiting period.

36. What is replacement algorithm?

Answer: When the cache is full and a memory word that is not in the cache is referenced, the cache control hardware must decide which block should be removed to create space for the new block that contains the reference word. The collection of rules for making this decision constitutes the replacement algorithm.

37. What do you mean by Least Recently Used (LRU)?

Answer: A replacement scheme in which the block replaced is the one that has been unused for the longest time is called least recently used replacement scheme.

38. What are the various memory technologies?

Answer: Computer memory is classified as primary memory and secondary memory. Memory technologies in use for primary memory are : static RAM, Dynamic RAM, ROM and its types (PROM, EPROM, EEPROM) etc. Memory technologies in use for secondary memory are optical disk, flash‒based removal memory card, hard‒disk drives, magnetic tapes etc.

39. What is virtual memory?

Answer: In modern computers, the operating system moves program and data automatically between the main memory and secondary storage. Techniques that automatically swaps program and data blocks between main memory and secondary storage device are called virtual memory. The addresses that processor issues to access either instruction or data are called virtual or logical address.

40. What is the function of memory management unit?

Answer: The memory management unit controls this virtual memory system. It translates virtual address into physical address.

41. What is meant by address mapping?

Answer: The virtually addressed memory with pages mapped to main memory. This process is called address mapping or address translation.

42. What is page fault?

Answer: Page fault is an event that occurs when an accessed page is not present in main memory.

43. What is TLB (Translation Look‒aside Buffer)?

Answer: To support demand paging and virtual memory processor has to access page table which is kept in the main memory. To avoid the access time and degradation of performance, a small portion of the page table is accommodated in the memory management unit. This portion is called Translation Lookaside Buffer (TLB).

44. What is the function of a TLB (Translation Look ‒ aside Buffer)?

Answer: TLB is used to hold the page table entries that corresponds to the most recently accessed pages. When processor finds the page table entries in the TLB it does not have to access page table and saves substantial access time

45. What is virtual address ?

Answer: Virtual address is an address that corresponds to alocation in virtual space and is translated by address mapping to a physical address when memory is accessed.

46. What is virtual page number?

Answer: Each virtual address generated by the processor whether it is for an instruction fetch is interpreted as a virtual page.

47. What is page frame ?

Answer: An area in the main memory that can hold one page is called page frame.

48. What is MMU ?

Answer: MMU is the Memory Management Unit. It is a special memory control circuit used for implementing the mapping of the virtual address space onto the physical memory.

49. What are pages?

Answer: All programs and data are composed of fixed length units called pages. Each page consists of blocks of words that occupies contiguous locations in main memory.

50. What is dirty or modified bit ?

Answer: The cache location is updated with an associated flag bit called dirty bit.

51. An address space is specified by 24‒bits and the corresponding memory space by 16‒bits: How many words are there in the: a) Virtual memory b) Main memory

Answer:

a) Words in the virtual memory = 2²⁴ = 16 M words

b) Words in the main memory = 2¹⁶ = 64 K words.

52. What do you mean by virtually addressed cache ?

Answer: The processor can index the cache with an address that is completely or partially virtual. This is called a virtually addressed cache. It uses tags that are virtual addresses and hence such a cache is virtually indexed and virtually tagged.

53. What do you mean by physically addressed cache ?

Answer: A cache that is addressed by a physical address is called physically addressed cache.

54. What is cache aliasing ?

Answer: In case of virtually address cache. The pages are shared between programs and which may access them with different virtual addresses. Cache aliasing occurs when two addresses are assigned for a same page.

55. Define supervisor/kernel/ executive state.

Answer: The state which indicates that a running process is an operating system process is called supervisor / kernel / executive state. Special instructions are available only in this state.

56. Define system call.

Answer: It is a special instruction that transfers control from user mode to a dedicated location in supervisor code space, invoking the exception mechanism in the process.

57. State the advantages of virtual memory?

Answer: 1. It allows to load and execute a process that requires a larger amount of memory than what is available by loading the process in parts and then executing them.

2. It eliminates external memory fragmentation.

58. What is the need for memory protection in a virtual memory system?

Answer: Memory protection prevents one process from accessing or modifying another process's memory. It avoids crashes, data corruption, and ensures system security.

59. Differentiate between user mode and supervisor mode.

Answer:

• User mode : Limited privilege; cannot directly access hardware or kernel memory.

• Supervisor mode : Full privilege; OS runs here and can control memory, devices and page tables.

60. What is the role of the page table in memory protection?

Answer: Page tables store permission bits (read, write, execute). The CPU checks these permissions on each memory access and raises an exception if access is illegal.

61. Why are user programs not allowed to modify page tables?

Answer: Because modifying page tables would let a process access any physical memory. Only the OS can modify page tables to maintain protection and isolation.

62. What is memory management and what are its main goals?

Answer: Memory management is the process of allocating, tracking and reclaiming memory used by programs. Its main goals are:

• Efficient utilization of memory

• Protection among processes

• Support for multitasking and virtual memory

63. Differentiate between contiguous and non‒contiguous memory allocation.

Answer:

• Contiguous allocation : A process occupies one continuous block of memory. Simple but suffers from fragmentation.

• Non‒contiguous allocation : A process is stored in multiple scattered memory blocks. Supports paging, segmentation and allows large programs to run efficiently.

64. What are the advantages and disadvantages of paging ?

Answer:

Advantages:

• Eliminates external fragmentation

• Simple memory allocation

• Supports virtual memory

Disadvantages:

• Internal fragmentation (unused space within pages)

• Extra overhead due to page table management

65. Explain virtual memory and state its advantages.

Answer: Virtual memory allows programs larger than the physical RAM to run by storing part of the program in secondary storage. Required pages/segments are loaded into RAM when needed. Advantages:

• Increases effective memory size

• Enables multiple programs to run simultaneously

• Provides isolation and memory protection

66. What is a Virtual Machine (VM)? Explain the host and guest.

Answer: A Virtual Machine (VM) is a software‒created computer system that behaves like a real physical machine. It has its own virtual CPU, memory, storage and operating system.

• Host: The real physical hardware on which VMs run.

• Guest: The virtual machine, along with its operating system and applications.

67. Why did virtual machines become popular in modern systems?

Answer: Virtual machines became popular because they provide:

• Strong isolation and security between programs.

• Better resource sharing in cloud computing.

• Ability to run multiple operating systems on one machine.

• Support for old OS/software.

• Faster processors, which reduce virtualization overhead.

68. What is a Virtual Machine Monitor (VMM) or Hypervisor? State its responsibilities.

Answer: A VMM or hypervisor is software that creates and manages virtual machines.

Its main responsibilities are:

1. Interface presentation : Gives each VM the illusion of real hardware.

2. Resource mapping : Distributes CPU, memory, and I/O among VMs.

3. Isolation and protection : Ensures each VM is protected from others.

69. List any three benefits of using virtual machines.

Answer:

1. Running multiple operating systems on one computer.

2. Easy software testing and development using isolated VMs.

3. Live migration of VMs between servers for load balancing and maintenance.

70. What is virtualization overhead? How does it affect CPU‒bound and I/O‒bound programs?

Answer: Virtualization overhead is the performance loss that occurs because the VMM must manage or emulate some instructions.

• CPU‒bound programs : Very little overhead; they run almost at native speed.

• I/O‒bound programs : High overhead; many I/O instructions must be checked or emulated by the VMM.

71. Why must the VMM run at a higher privilege level than the guest OS?

Answer: The VMM must run at a higher privilege level so it can control hardware resources and intercept any privileged instruction executed by the guest OS. This ensures protection, isolation and correct virtualization behavior.

72. What are the hardware requirements for effective virtualization?

Answer: Hardware must provide :

1. At least two modes: system mode and user mode.

2. Privileged instructions that trap when executed in user mode.

3. Support to let the VMM control I/O, interrupts, and sensitive hardware state.

73. What is a virtualizable ISA? Give examples.

Answer: A virtualizable ISA is an instruction set designed so that all sensitive instructions trap when executed in user mode. This allows efficient virtualization.

Examples: IBM 370 and RISC‒V.

74. Why do some architectures like x86 and ARM create challenges for virtualization?

Answer: Older architectures like x86 and ARM contain some sensitive instructions that :

• Do not trap in user mode,

• Behave differently at different privilege levels,

• Directly access the hardware state.

This makes virtualization harder and requires extra emulation by the VMM.

75. How does a VMM handle privileged instructions executed by a guest OS?

Answer: When a guest OS (running in user mode) executes a privileged instruction, it generates a trap to the VMM. The VMM :

1. Intercepts the instruction.

2. Emulates or updates the virtual hardware state.

3. Returns control back to the guest OS.

76. What is the role of the operating system in I/O management?

Answer: The OS stands between user programs and hardware. It controls device access, handles interrupts, provides protection, schedules I/O operations and hides low‒level device details from user programs.

77. Why can't user programs directly access I/O devices?

Answer: Direct access is restricted to ensure protection, prevent conflicts between programs and avoid incorrect device operations. Only the OS can safely manage I/O registers and addresses.

78. What is memory‒mapped I/O ?

 Answer: In memory‒mapped I/O, specific memory addresses are reserved for I/O devices. A read/write to these addresses is interpreted as a device command instead of normal memory access.

79. What is I/O‒mapped I/O ?

Answer: I/O‒mapped I/O uses special I/O instructions and a separate address space for devices. The processor provides dedicated control signals (IOR/IOW) for I/O operations.

80. Give two differences between memory‒mapped I/O and I/O‒mapped I/O.

Answer:

1. Memory‒mapped: single unified address space; I/O‒mapped: separate I/O address space.

2. Memory‒mapped uses memory control signals; I/O‒mapped uses separate I/O control signals.

81. What is programmed I/O ?

Answer: A method where the processor performs all I/O operations using a fixed instruction sequence starting the device, polling status, and transferring data.

82. What is polling in programmed I/O ?

Answer: Polling is the repeated checking of a device's status register to determine whether it needs service. It causes busy‒waiting.

83. State two advantages of programmed I/O.

Answer: Simple to implement and gives complete processor control. No extra hardware is required.

84. State two disadvantages of programmed I/O.

Answer: Wastes CPU time due to busy‒waiting and does not scale well for multiple or high‒speed devices.

85. What is an interrupt?

Answer: An interrupt is an asynchronous signal that causes the processor to stop its current execution and run a predefined Interrupt Service Routine (ISR).

86. Distinguish between hardware and software interrupts.

Answer:

Hardware interrupts : generated by external devices, asynchronous.

Software interrupts : generated by instructions, synchronous used for OS services.

87. What are maskable and non‒maskable interrupts ?

Answer: Maskable interrupts can be enabled / disabled by software; Non‒Maskable Interrupts (NMI) cannot be disabled and are reserved for critical events.

88. What is a vectored interrupt?

Answer: A vectored interrupt automatically provides the address of the ISR to the processor, giving fast and direct interrupt handling.

89. What is a non‒vectored interrupt?

Answer: In non‒vectored interrupts, the processor jumps to a fixed address and software determines which device caused the interrupt.

90. What is interrupt nesting?

Answer: A mechanism that allows a higher‒priority interrupt to interrupt a lower‒priority ISR, ensuring urgent events are handled first.

91. Give two advantages of interrupt‒driven I/O over programmed I/O.

Answer: Better CPU utilization and no need for continuous polling, leading to improved efficiency.

92. What is a Daisy‒Chain priority arrangement?

Answer: Devices share the same interrupt request line and the interrupt acknowledge signal passes through them in sequence. The device closest to the processor has the highest priority.

93. What is group‒based interrupt priority?

Answer: Devices are divided into groups, each with a unique priority level. Within a group, daisy‒ chain order decides priority.

94. What is the purpose of the Status and Cause registers in MIPS interrupt handling?

Answer: The Status register enables/disables specific interrupts; the Cause register indicates which interrupt is pending.

95. What is DMA (Direct Memory Access)?

Answer: A hardware mechanism allowing data transfer directly between memory and I/O devices without continuous CPU involvement,

96. What are the three steps of a DMA transfer?

Answer:

1. Processor setup of DMA controller.

2. DMA data transfer by controlling the bus.

3. Completion interrupt to signal transfer end.

97. What is cycle stealing (single‒transfer) mode in DMA ?

Answer: DMA transfers one byte/word at a time. It momentarily "steals" the bus from the CPU for every transfer.

98. What is block transfer mode in DMA ?

Answer: DMA takes full control of the bus and transfers a whole block continuously. CPU is halted during the entire block transfer.

99. What is the cache coherence problem caused by DMA ?

Answer: Because DMA bypasses the cache, memory and cache may hold different values (stale data). This causes inconsistency.

100. How can the OS solve virtual memory problems during DMA ?

Answer: Either provide the DMA controller with address translation tables or split large transfers into page‒sized segments.

101. What is RAID and what are its main benefits?

Answer: RAID (Redundant Array of Independent Disks) is a storage technology that combines multiple physical disks into a single logical unit.

Its main benefits are:

1. Increased reliability ‒ Data is copied or protected using redundancy, so the system can survive disk failure.

2. Improved performance ‒ Data can be read / written across multiple disks simultaneously, increasing speed.

102. Write any two drawbacks of RAID systems.

Answer:

1. Cost : RAID requires multiple disks, increasing hardware cost.

2. Complexity : Setup and management are more complex compared to a single‒disk system.

103. What is RAID 0 ? State its advantages and disadvantages.

Answer: RAID 0 uses striping, where data is split across two or more disks.

Advantages : High read/write speed, full use of disk capacity.

Disadvantage : No redundancy; failure of one disk results in complete data loss.

104. Differentiate between RAID 1 and RAID 5.

Answer:

• RAID 1 (Mirroring) : Stores an exact copy of data on two disks. High redundancy but only 50% storage efficiency.

• RAID 5 (Striping with Parity) : Spreads data and parity across three or more disks. Provides good fault tolerance and better storage efficiency, but has slower write performance.

105. What is RAID 10? Mention one benefit and one drawback.

Answer: RAID 10 combines mirroring (RAID 1) and striping (RAID 0).

Benefit : Offers both high performance and high redundancy.

Drawback : Requires at least four disks and provides only 50% usable storage.