Arithmetic for Computers: Important Questions

Computer Organization and Architecture

Chapter 2:Arithmetic for Computers

Important Questions

1. Write rule for addition of two numbers.

2. Perform subtraction of binary numbers in 2's complement method.

3. What is half adder? Design a half adder as a two‒level AND‒OR circuit and show how to implement a full adder using two half adders and a external logic gate.

4. Draw the half adder circuit.

5. Write the logic equations of a binary half a adder.

6. Draw the symbolic representation of the full‒adder and give the expression for the sum.

7. Draw a full‒adder circuit and give the truth table.

8. Draw the full adder circuit using two half adders.

9. Design the full adder circuit.

10. Draw and explain a block diagram of ripple carry adder.

11. What is a ripple carry adder?

12. Draw and explain the block diagram of 4‒bit subtractor.

13. Explain the working of 4‒bit subtractor.

14. Indicate how an overflow is detected?

15. Define overflow rule in addition.

16. Give the block diagram of the hardware implementation of addition and subtraction of signed number and explain the operations with flowchart.

17. Explain the procedure for addition and subtraction with signed‒magnitude data with the help of flowchart.

18. A half‒adder is a combinational logic circuit that has two inputs, x and y and two outputs, s and c, that are the sum and carry‒out respectively, resulting from the binary addition of x and y.

i) Design a half‒adder as a two‒level AND‒OR circuit.

ii) Show how to implement a full‒adder using two half‒adder and external logic gates as necessary.

iii) Compare the longest logic delay path through the network derived in part ii) to that of the logic delay of the adder network implemented using basic gates.

19. Explain the hardware for signed‒magnitude addition subtraction with block diagram.

20. Design a 4‒bit binary adder/subtractor and explain its functions.

21. Explain how complement number system is useful in computer system. Discuss any one complement number system with example.

22. Explain addition and subtraction operations with signed 2's complement integer data. Support your answer by taking appropriate example(s).

23. Design a digital circuit for 4‒bit binary adder.

24. Draw and explain flowchart for addition and subtraction operations with sign‒magnitude data.

25. Explain in detail the principle of carry‒look‒ahead adder.

26. What is the disadvantages in using a ripple carry adder?

27. Explain the design of a 4‒bit carry‒look ahead adder.

28. In carry‒look ahead addition, explain generate stage G_i and propagate P_i functions for stage i with the help of boolean expression for G_i and P_i.

29. Explain an algorithm to multiply two positive numbers. Also discuss the realization of a multiplier to implement the same.

30. Explain the operation of sequential circuit binary multiplier with

Multiplicand 1101

Multiplier 1011.

31. Draw flowchart for hardware multiplication algorithm and explain it.

32. Explain Booth's multiplication algorithm for multiplying binary integers in signed 2's complement representation.

33. Explain Booth's algorithm with flowchart.

34. Assume A = (+8) and B = (+5). Multiply these two numbers using Booth algorithm. Show the step‒by‒step multiplication process.

35. Explain the modified Booth's algorithm.

36. What is bit‒pair recoding?

37. Carry out bit pair recoding of following multipliers

1 1 0 1 0

0 1 1 0 1.

38. Design an array multiplier that multipliers two 4 bit numbers. Use AND gates and binary address.

39. Draw and explain 2‒bit by 2‒bit array multiplier.

40. Explain the concept of carry save addition for the multiplication operation, M × Q = P for 4‒bit operands, with diagram and suitable example.

41. Write a note on the carry‒save multiplier.

42. Draw the flowchart for restoring division algorithm.

43. Draw the flowchart for non‒restoring division algorithm.

44. Compare restoring and non‒restoring division algorithm.

45. Write restoring unsigned division algorithm.

46. Perform the following division using restoring and nonrestoring division algorithm.

Dividend = 1100 Divisor = 0011

47. Perform following division using restoring and non‒restoring algorithm.

Dividend = 1010 and Divisor = 0011.

48. Perform division of the following numbers using restoring and non restoring division algorithm. A: 1100 and B: 0100

49. Define IEEE floating point single and double precision standard.

50. What is denormal? Define NaN ?

51. In conforming to the IEEE standard mention any four situations under which a processor sets exception flag.

52. Define underflow and overflow.

53. State and explain the rules in arithmetic operations on floating point numbers.

54. Explain the working of floating point adder/subtractor.

55. Explain the floating point Add/Subtract rules. With a detailed flowchart explain how floating point addition/subtraction is performed.

56. Derive and explain an algorithm for adding and subtracting two floating point binary numbers.

57. Draw the hardware implementation of floating point operations.

58. Explain the rules for basic arithmetic operations of floating point numbers.

59. Explain how floating point addition is carried out in a computer system. Give an example for a binary floating point addition.

60. Explain briefly about floating point addition and subtraction alogorithms.

61. Design an arithmatic element to perform the basic floating point operations.

62. How do you perform the floating point multiplication and division?

63. Rules of multiplication.

64. Rules of division.

65. Explain the 4‒bit arithmetic circuit using the multiplexer.

66. Explain the 4‒bit arithmetic circuit with its function table.

67. Explain the design of the logic circuit using the multiplexer.

68. What is subword parallelism? Explain with an example

69. Why is SIMD useful in multimedia processing ?