Computer Organization and Architecture: Chapter 2: Arithmetic for Computers

Arithmetic for Computers: Two Marks Important Questions and Answers

Computer Organization and Architecture

Computer Organization and Architecture: Chapter 2: Arithmetic for Computers: Anna University Part A Two Marks Important Questions and Answers

Computer Organization and Architecture

Chapter 2: Arithmetic for Computers

 

Two Marks Questions with Answers

 

1. How do you relate addition and subtraction ?

Answer: We can relate addition and subtraction operations of numbers by the following relationship:

 (± A) ‒ (+B) = ( ± A) + (‒B) and

 (± A) − (−B) = (± A) + (+B)

2. What is half adder ?

Answer: The logic circuit which performs addition of two binary bits is called a half‒adder.

3. What is full adder ?

Answer: The circuit which performs addition of three bits (two significant bits and a previous carry) is a full‒adder.

4. State true or false :

In binary number system, B‒A is equivalent to B+ Ā + 1.

Answer: True

5. What is a ripple carry adder ?

Answer:

The n‒bit parallel adder using n number of full‒adder circuits connected in cascade, i.e. the carry output of each adder is connected to the carry input of the next higher‒order adder is called ripple carry adder.

6. Define overflow rule in addition.

Answer: When both operands a and b have the same sign, an overflow occurs when the sign of result does not agree with the signs of a and b.

7. How do you ascertain an adder as "fast" ?

Answer: If adder, has a mechanism such as lookahead carry adder to avoid carry propagation delay, the adder is called fast adder.

8. Discuss the principle behind the Booth's multiplier.

Answer: Booth's algorithm generates a 2n‒bit product and treats both positive and negative numbers uniformly. This algorithm suggest that we can reduce the number of operations required for multiplication by representing multiplier as a difference between two numbers.

9. Discuss the role of Booth's algorithm in the design of fast multipliers.

Answer: To speed‒up the multiplication process in the Booth's algorithm a technique called bit‒pair recoding is used. It is also called modified Booth's algorithm. It halves the maximum number of summands. In this technique, the Booth‒recoded multiplier bits are grouped in pairs. Then each pair is represented by its equivalent single bit multiplier reducing total number of multiplier bits to half.

10. What is combinational multiplier or array multiplier ?

Answer: The multiplier which uses n shifts and adds operations to multiply n‒bit binary number is called combinational multiplier or array multiplier.

11. What are the two techniques for speeding up the multiplication operation ?

Answer:

1) Bit pair recoding

2) Carry save addition

12. How bit pair recoding of multiplier speeds up the multiplication process?

Answer: It guarantees that the maximum number of summands that must be added is n/2 for n‒bit operands.

13. How CSA speeds up multiplication ?

Answer: It reduces the time needed to add the summands. Instead of letting the carries ripple along the rows, they can be saved and introduced into the next row, at the correct waited position.

14. Write down the steps for restoring division.

Answer:

1. Shift A and Q left one binary position.

2. Subtract divisor from A and place answer back in A (A←A ‒ B).

3. If the sign bit of A is 1, set Q0 to 0 and add divisor back to A (that is, restore A); Otherwise, set Qo to 1.

4. Repeat steps 1, 2, and 3 n times.

15. State the rules of floating point multiplication.

Answer:

1. Add the exponents and subtract bias (127 in case of single precision numbers and 1023 in case of double precision numbers).

2. Multiply the mantissas and determine the sign of the result.

3. Normalize the result.

16. State the rules of floating point division.

Answer:

1. Subtract exponents and add bias (127 in case of single precision numbers and 1023 in bello a case of double precision numbers).

2. Divide the mantissas and determine the sign of the result.

3. Normalize the result.

17. What do you mean by guard bits?

Answer: The mantissas of initial operands and final results are limited to 24‒bits, including the implicit leading 1. But if we provide extra bits in the intermediate steps of calculations we can get maximum accuracy in the final result. These extra bits used in the intermediate calculations are called guard bits.

18. State the commonly used methods of truncation.

Answer: There are three commonly used methods of truncation:

• Chopping

• Von Neumann rounding

• Rounding

19. What is an ALU ?

Answer: An ALU (Arithmetic Logic Unit) is a digital circuit within the CPU that performs arithmetic operations (Like addition, subtraction) and logical operations (Like AND, OR, NOT, XOR). It is the core component responsible for data processing in a computer.

20. What are the main components of an ALU ?

Answer: The main components of an ALU are :

1. Arithmetic unit Performs arithmetic operations such as addition and subtraction.

2. Logic unit ‒ Performs logical operations such as AND, OR, XOR, and NOT.

3. Multiplexers and control unit Select and control which operation is performed.

21. What is the role of control signals in ALU design ?

Answer: Control signals determine which specific operation (Arithmetic or logical) the ALU should perform at a given time. These signals are generated by the control unit based on the instruction being executed.

22. What is the difference between arithmetic and logical operations in an ALU ?

Answer: Arithmetic operations involve numerical calculations such as addition or subtraction, while logical operations involve bitwise manipulation such as AND, OR, and XOR.

23. What is subword parallelism?

Answer: Subword parallelism is a technique where a wide data word (such as 128 bits) is divided into smaller parts, allowing the processor to perform the same operation on multiple smaller data elements (Like bytes or halfwords) simultaneously.

24. What does SIMD stand for?

Answer: SIMD stands for single instruction, multiple data. It means a single instruction operates on multiple data elements in parallel, improving processing speed for repetitive tasks.

25. How many 8‒bit values can be processed simultaneously using a 128‒bit adder ?

Answer: A 128‒bit adder can process sixteen 8‒bit values simultaneously in one instruction.

26. Why was subword parallelism introduced in processors ?

Answer: Subword parallelism was introduced to speed up multimedia applications‒Like image, video, and sound processing‒that perform repetitive operations on small data units such as bytes and halfwords.

27. How are colors represented in computer graphics ?

Answer: Colors are represented using three primary components‒Red, Green, and Blue (RGB)‒each using 8 bits, making 24 bits per pixel, or 32 bits if an extra transparency (Alpha) channel is included.

28. Why do audio samples use 16 bits instead of 8 bits ?

Answer: Audio samples use 16 bits for higher precision, which allows better sound quality and more accurate representation of audio signals.

 

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