Combinational Circuits: Important Questions

Digital Principles and Computer Organization:

Chapter 4: Combinational Circuits

Important Questions

1. What is combinational logic circuit ?

2. Explain the design procedure for combinational circuits.

3. Design a full adder

4. Define half adder and full adder.

5. Draw a block diagram of half adder. Write truth table. Draw logic diagram.

6. Write a truth table for half adder, reduce the equation using K–map and design half adder using logic gates.

7. Define full adder. Draw logic circuit and truth table of full adder.

8. Implement full adder using two half adders.

9. Define half subtractor and full subtractor.

10. Design a half–subtractor combinational circuit to produce the outputs. Difference and borrow.

11. Explain the operation of a half subtractor with the help of logic diagram and truth table.

12. Write the logic expressions for the difference and borrow of a half subtractor.

13. Realize full–subtractor using K–map.

14. Write an expression for borrow and difference in a full subtractor circuit.

15. Design full–subtractor circuit and draw necessary truth tables.

16. Explain how full subtractor can be designed by using two half subtractor circuits. Draw the circuit diagram.

17. What is parallel adder ?

18. Draw and explain the working of 4–bit parallel adder.

19. Draw and explain 4–bit parallel subtractor.

20. Design a 4–bit binary adder/subtractor and explain its functions.

21. Indicate how an overflow is detected?

22. Define overflow rule in addition.

23. Define multiplexer.

24. What is data selector?

25. Draw and explain the working of 2 : 1 multiplexer and realize it using basic gates.

26. Explain 4 : 1 multiplexer with the help of logic circuit and truth table.

27. Write the truth table of a 4: 1 multiplexer.

28. Explain 8 : 1 multiplexer with the help of logic circuit and truth table.

29. Explain the concept and working of quadruple 2 to 1 line multiplexer.

30. State the applications of multiplexers.

31. Illustrate the concept of basic 4–input mutiplexer.

32. Define decoder.

33. Define binary decoder.

34. Explain the working of 2: 4 binary decoder.

35. Draw a 4 × 16 decoder constructed with two 3 × 8 decoders.

36. State the procedure to implement Boolean function using decoder.

37. Mention the uses of decoders.

38. Draw the logic diagram of BCD – Decimal decoder and explain its operations.

39. Write a note on BCD to 7–segment decoder.

40. What do you mean by carry propagation delay?

41. Explain the method used for fast addition (carry look ahead generation).

42. Relate carry generate, carry propagate, sum and carry–out of a carry look ahead adder.

43. Explain the concept of carry look ahead adder with neat logic diagram.

44. Explain an algorithm to multiply two positive numbers. Also discuss the realization of a multiplier to implement the same.

45. Design a multiplier that multiplies two 4–bit numbers.

46. Explain with an example how to multiply two unsigned binary numbers.

47. Explain the sequential version of multiplication algorithm and its hardware.

48. Demonstrate multiplication of two binary numbers with an example. Design an arithmatic element to perform this multiplication.

49. Discuss the principle behind the Booth's multiplier.

50. Illustrate Booth's algorithm with an example.

51. Explain in detail about the multiplication algorithm with suitable example and diagram.

52. Define Booth Multiplication algorithm with suitable example.

53. Explain Booth's Algorithm for the multiplication of signed two's complement numbers.

54. Illustrate multiplication of signed 2's complement numbers 01101 and 11010 using bit–pairing of the multipliers.

55. Explain the restoring division algorithm.

56. Discuss in detail about division algorithm in detail with diagram and examples.

57. Explain non–restoring division algorithm with the help of suitable example.

58. Draw the block diagram of integer divider and explain the division algorithm.

59. Compare restoring and non–restoring division algorithm.

60. What are floating pointer numbers ?

61. Explain the representations of floating point numbers in detail.

62. Draw the format of floating point number.

63. Define IEEE floating point single and double precision standard.

64. What is denormal ? Define NaN ?

65. In conforming to the IEEE standard mention any four situations under which a processor sets exception flag.

66. Define underflow and overflow.

67. State and explain the rules in arithmetic operations on floating point numbers.

68. Explain the working of floating point adder/subtractor.

69. Explain the floating point Add/Subtract rules. With a detailed flowchart explain how floating point addition/subtraction is performed.

70. Derive and explain an algorithm for adding and subtracting two floating point binary numbers.

71. Draw the hardware implementation of floating point operations.

72. Explain the rules for basic arithmetic operations of floating point numbers.

73. Explain how floating point addition is carried out in a computer system. Give an example for a binary floating point addition.

74. Explain briefly about floating point addition and subtraction alogorithms.

75. Design an arithmatic element to perform the basic floating point operations.

76. Explain floating point addition algorithm with a neat block diagram.

77. How do you perform the floating point multiplication and division ?

78. Rules of multiplication.

79. Rules of division.