Processor Design: Important Questions

Computer Organization and Architecture

Chapter 3: Processor Design

Important Questions

1. Draw and explain the functional block diagram for implementation of MIPS subset.

2. Draw and explain the function block diagram with control signals for basic implementation of MIPS subset.

3. Explain the basic MIPS implementation with necessary multiplexers and control lines.

4. Write the two steps that are common to implement any type of instruction.

5. Draw and explain the datapath to implement instruction fetch and PC increment operations.

6. Draw and explain the datapath segment for arithmetic‒logic instructions.

7. Draw and explain the datapath segment for load word and store word instructions.

8. Draw and explain the datapath segment for computation of branch target address.

9. Explain the structure of the datapath segment that handles branches with the help of block diagram.

10. Draw and explain the simple combine datapath for the MIPS architecture.

11. Explain data path in detail.

12. What are R‒Type instructions?

13. State the advantages of multiple levels of decoding.

14. Give instruction formats for R type, load or store and branch instructions.

15. Draw the simple combine datapath with all necessary multiplexers and control lines.

16. State the functions of following control lines.

a) PC Src b) ALU Src c) RegDst d) Mem R

17. Draw and explain the simple datapath with the control unit and explain the execution of ALU instructions.

18. With the help of a neat diagram explain the operation of datapath for R type instruction.

19. With the help of a neat diagram explain the operation of datapath for load instruction.

20. Give the sequential steps required for execution of R‒type instruction.

21. Give the sequential steps required for execution of load instruction.

22. Explain the operation of datapath for branch instruction.

23. Give the sequential steps required for execution of branch operation.

24. Draw the format of jump instruction.

25. Draw and explain the datapath operation for jump instruction.

26. State the reasons for not using single cycle implementation.

27. Explain data path control in detail.

28. Draw and explain typical hardwired control unit.

29. With a diagram which shows the separation decoding and encoding functions, explain hardwired control.

30. Show the generation Z_in and end control signal.

31. What modification is required in the basic organization to support microprogram branching?

32. Explain the basic concept of microprogrammed control.

33. Describe the organization of microprogrammed control unit.

34. State the advantages and disadvantages of microprogrammed control.

35. Show the control sequences for execution of Add (R3), R1 and explain.

36. Explain microinstruction sequencing with next address field.

37. List out the advantages and limitations of a hardwired control unit. Explain the organization of a micro programmed control unit.

38. Compare hardwired control unit with microprogrammed control unit.

39. What is ILP ?

40. Write a note on instruction‒level parallelism.

41. State benefits and challenges of instruction‒level parallelism.

42. State the techniques for ILP.

43. Explain the basic concepts of pipelining.

44. Explain basic operation of a four stage pipelining with a neat diagram.

45. Discuss the basic concepts of pipelining.

46. State the pipeline stages in the MIPs instructions.

47. Justify the statement: MIPs instructions are designed for pipelining.

48. Discuss the various hazards that might arise in a pipeline.

49. Define structural hazard, data hazard and control hazard.

50. Explain structural hazard.

51. Define: a. Pipeline frequency

b. Clock skewing

c. Pipeline throughput

d. Speedup factor

e. Pipeline efficiency

f. Performance/cost ratio.

52. What is hazard? Explain its types with suitable example.

53. Explain the different types of pipeline hazards with suitable examples.

54. Explain how the instruction pipeline works? What are the various situations where an instruction pipeline can stall? Illustrate with an example.

55. Explain how the instruction pipeline works. What are the various situations where an instruction pipeline can stall?

56. Explain the hazards caused by unconditional branching statements.

57. Draw and explain the implementation of two stage instruction pipelining.

58. Draw and explain the implementation of four stage instruction pipelining.

59. Explain implementation of MIPS instruction pipeline.

60. Draw and explain the single cycle datapath with added control to the pipeline datapath.

61. Disscuss about pipelined data path and control.

62. Write down the five stages of instruction executions.

63. Describe the methods for dealing with data hazards.

64. Explain the ways and means of handling data hazard.

65. List the conditions to overcome data hazard.

66. What is a data hazard? How do you overcome it? And discuss its side effects.

67. Explain data hazard in detail.

68. Describe operand forwarding in a pipeline processor with a diagram.

69. Discuss the modified data path to accommodate pipelined executions with a diagram.

70. What is branch hazard? Describe the methods for dealing with the branch hazards.

71. Highlight the solutions of instruction hazards.

72. Discuss in detail about hazards due to unconditional branching,

73. What is instruction hazard? Explain the methods for dealing with the instruction hazards.

74. What are the hazards of conditional branches in pipelines ? how it can be resolved?

75. Describe the techniques for handling control hazards in pipelining.

76. Distinguish between static and dynamic branch prediction approaches.

77. Explain dynamic branch prediction technique.

78. Discuss the methods to reduce hazards due to conditional branches.

79. Why is branch prediction algorithm needed? Differentiate between the static and dynamic techniques.

80. Define exception and interrupt.

81. Explain in detail how exceptions are handled in MIPS architecture?

82. State two methods used to communicate the reasons for exception.

83. Define imprecise and precise exceptions.

84. What is an exception? Give one example for MIPS exception.